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317607-001 参数 Datasheet PDF下载

317607-001图片预览
型号: 317607-001
PDF下载: 下载PDF文件 查看货源
内容描述: Express芯片组 [Express Chipset]
分类和应用:
文件页数/大小: 351 页 / 2481 K
品牌: INTEL [ INTEL ]
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Functional Description  
10.7.3  
Programming Sequence  
Note: The following sequence must be followed in BIOS to properly set up the Hot  
Trip Point and SMI# assertion.  
1. In Thermal Sensor Control 1 Register (TSC1), set thermal sensor enable bit (TSE)  
and the hysteresis value (DHA) by writing 99h to MCHBAR CD8h.  
2. Program the Hot Trip Point Register (TSTTP[HTPS]) by writing the appropriate  
value to MCHBAR CDCh bits [15:8].  
3. Program the Catastrophic Trip Point Setting Register (TSTTP[CTPS]) by writing  
2Ch to MCHBAR CDCh bits [7:0].  
4. In Thermal Sensor Control 2 Register (TSC2), program the Thermometer Mode  
Enable and Rate (TE) by writing 04h to MCHBAR CD9h bits [3:0].  
5. In the Hardware Protection Register (THERM1), program the Halt on Catastrophic  
bit (HOC) by writing 08h to MCHBAR CE4h bits [7:0].  
6. Lock the Hardware Protection by writing a 1 to the Lock bit (HTL) at MCHBAR  
CE4h bit [0].  
7. In Thermal SMI Command Register (TSMICMD), set the SMI# on Hot bit by  
writing a 02h to MCHBAR CF1h.  
8. Program the SMI Command register (SMICMD[TSTSMI]) by writing a 1 to bit 11 to  
PCI CCh.  
9. Program the TCO Register (TCO[TSLB]) to lock down the other register settings by  
writing a 1 to bit 7 of MCHBAR CE2h.  
If the temperature rises above the Hot Trip point:  
The TIS[Hot Thermal Sensor Interrupt Event] is set when SMI# interrupt is generated.  
Clear this bit of the TIS register to allow subsequent interrupts of this type to get  
registered.  
Clear the global thermal sensor event bit in the Error Status Register, bit 11.  
In thermal sensor status register (TSS), the Hot trip indicator (HTI) bit is set if this  
condition is still valid by the time the software gets to read the register.  
10.7.4  
Trip Point Temperature Programming  
The Catastrophic and Hot trip points are programmed in the TSTTP - Thermal Sensor  
Temperature Trip Point Register. Bits 7:0 are for the Catastrophic trip point (CTPS),  
and bits 15:8 are for the Hot trip point (HTPS).  
Note: Based on Intel silicon test and calculations, the Catastrophic trip point must  
be fixed at 115 °C. The Hot trip point is recommended to be between 85 °C  
and 105 °C. Programming the Hot Trip Point above this range is not  
recommended.  
To program both trip point settings, the following polynomial equation should be used.  
Programmed temp = (0.0016*value^2)–(1.10707*value)+161.05  
Datasheet  
305  
 
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