Contents
1
Introduction...................................................................................................18
1.1
1.2
1.3
Terminology ........................................................................................20
Reference Documents ...........................................................................22
GMCH Overview...................................................................................23
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.6
1.3.7
1.3.8
1.3.9
Host Interface.........................................................................23
System Memory Interface.........................................................24
Direct Media Interface (DMI).....................................................25
PCI Express* Interface.............................................................25
Graphics Features ...................................................................26
SDVO and Analog Display Features............................................26
GMCH Clocking .......................................................................27
Power Management .................................................................28
Thermal Sensor ......................................................................28
2
Signal Description...........................................................................................30
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
Host Interface Signals...........................................................................31
DDR2 DRAM Channel A Interface............................................................34
DDR2 DRAM Channel B Interface............................................................35
DDR2 DRAM Reference and Compensation ...............................................36
PCI Express* Interface Signals...............................................................36
Analog Display Signals..........................................................................36
Clocks, Reset, and Miscellaneous............................................................37
Direct Media Interface (DMI)..................................................................38
Controller Link (CL) ..............................................................................39
Intel® Serial DVO (SDVO) Interface ........................................................39
2.10.1 SDVO/PCI Express* Signal Mapping...........................................41
Power, Ground.....................................................................................42
2.11
3
System Address Map .......................................................................................44
3.1
Legacy Address Range ..........................................................................46
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
DOS Range (0h – 9_FFFFh).......................................................48
Legacy Video Area (A_0000h–B_FFFFh)......................................48
Expansion Area (C_0000h–D_FFFFh)..........................................48
Extended System BIOS Area (E_0000h-E_FFFFh).........................49
System BIOS Area (F_0000h – F_FFFFh) ....................................49
PAM Memory Area Details.........................................................50
Legacy Interrupt Routing..........................................................50
3.2
3.3
Main Memory Address Range (1MB – TOLUD)...........................................50
3.2.1
3.2.2
3.2.3
ISA Hole (15MB-16MB) ............................................................51
TSEG.....................................................................................51
Pre-allocated Memory ..............................................................52
PCI Memory Address Range (TOLUD – 4GB).............................................52
3.3.1
3.3.2
3.3.3
APIC Configuration Space (FEC0_0000h–FECF_FFFFh)..................54
HSEG (FEDA_0000h–FEDB_FFFFh).............................................54
FSB Interrupt Memory Space (FEE0_0000–FEEF_FFFFh) ...............54
Datasheet
3
INTEL [ INTEL ]
