Functional Description
Figure 10-3. Concurrent sDVO / PCI Express* Non-Reversed Configurations
GMCH GMCH
1
3
5
PEG
PEG
Pins
Signals
0
0
0
0
0
0
PCIe Lane 0
x1
PCIe
Card
x4
sDVO
(ADD2)
Card
PCIe
Video In
PCIe Lane N
x8
MEC Card
x16
PCIe
Card
sDVO
(ADD2)
Card
sDVO Lane 7
sDVO
Video Out
sDVO Lane 0
15
15
15
15
15
SDVO-Conc-PCIe_Non-Reversed_Config
Figure 10-4. Concurrent sDVO / PCI Express* Reversed Configurations
GMCH GMCH
2
4
6
PEG
PEG
Signals Pins
15
0
15
15
15
sDVO Lane 0
sDVO
Video Out
sDVO Lane 7
MEC Card
x8
x16
PCIe
Card
sDVO
(ADD2)
Card
PCIe Lane N
PCIe
x4
sDVO
(ADD2)
Card
Video In
x1
PCIe
Card
0
PCIe Lane 0
0
15
0
0
0
SDVO-Conc-PCIe_Reversed_Config
Datasheet
295
INTEL [ INTEL ]
