Introduction
Term
Description
Intel® ICH8
Eighth generation I/O Controller Hub component that contains additional
functionality compared to previous Intel® ICHs, The Intel® I/O Controller
Hub component contains the primary PCI interface, LPC interface, USB2,
SATA, and other I/O functions. It communicates with the GMCH over a
proprietary interconnect called DMI. For this GMCH, the term Intel® ICH
refers to Intel® ICH8.
IGD
Internal Graphics Device
Liquid Crystal Display
LCD
LVDS
Low Voltage Differential Signaling. A high speed, low power data
transmission standard used for display connections to LCD panels.
OOQ
MSI
Out of Order Queuing:
Message Signaled Interrupt. A transaction initiated outside the host,
conveying interrupt information to the receiving agent through the same
path that normally carries read and write commands.
PCI Express*
Primary PCI
Third Generation Input Output (PCI Express) Graphics Attach called PCI
Express Graphics. A high-speed serial interface whose configuration is
software compatible with the existing PCI specifications. The specific PCI
Express implementation intended for connecting the GMCH to an external
Graphics Controller is an x16 link and replaces AGP.
The physical PCI bus that is driven directly by the Intel® ICH8 component.
Communication between Primary PCI and the GMCH occurs over DMI. Note
that the Primary PCI bus is not PCI Bus 0 from a configuration standpoint.
SCI
System Control Interrupt. Used in ACPI protocol.
SDVO
Serial Digital Video Out (SDVO). Digital display channel that serially
transmits digital display data to an external SDVO device. The SDVO device
accepts this serialized format and then translates the data into the
appropriate display format (i.e. TMDS, LVDS, and TV-Out). This interface is
not electrically compatible with the previous digital display channel - DVO.
For G35, it will be multiplexed on a portion of the x16 graphics PCI Express
interface.
SDVO Device
Third party codec that utilizes SDVO as an input. May have a variety of
output formats, including DVI, LVDS, HDMI, TV-out, etc.
SERR
SMI
An indication that an unrecoverable error has occurred on an I/O bus.
System Management Interrupt. Used to indicate any of several system
conditions such as thermal sensor events, throttling activated, access to
System Management RAM, chassis open, or other system state related
activity.
Rank
A unit of DRAM corresponding to eight x8 SDRAM devices in parallel or four
x16 SDRAM devices in parallel, ignoring ECC. These devices are usually, but
not always, mounted on a single side of a DIMM.
TMDS
Transition Minimized Differential Signaling. Signaling interface from Silicon
Image that is used in DVI and HDMI.
VCO
UMA
Voltage Controlled Oscillator
Unified Memory Architecture. Describes an IGD using system memory for its
frame buffers.
Datasheet
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