Electrical Specifications
2.9
PECI DC Specifications
PECI is an Intel proprietary one-wire interface that provides a communication channel
between Intel processors (may also include chipset components in the future) and
external thermal monitoring devices. The processor contains Digital Thermal Sensors
(DTS) distributed throughout die. These sensors are implemented as analog-to-digital
converters calibrated at the factory for reasonable accuracy to provide a digital
representation of relative processor temperature. PECI provides an interface to relay
the highest DTS temperature within a die to external management devices for thermal/
fan speed control. More detailed information is available in the Platform Environment
Control Interface (PECI) Specification.
Table 19.
PECI DC Electrical Limits
Symbol
Definition and Conditions
Input Voltage Range
Min
Max
Units Notes
Vin
-0.15
VTT+ 0.15
—
V
Vhysteresis Hysteresis
0.1 * VTT
V
V
V
3
Vn
Vp
Negative-edge threshold voltage
0.275 * VTT
0.550 * VTT
0.500 * VTT
0.725 * VTT
Positive-edge threshold voltage
High level output source
(VOH = 0.75 * VTT)
Isource
-6.0
0.5
N/A
1.0
mA
mA
Low level output sink
(VOL = 0.25 * VTT)
Isink
Ileak+
Ileak-
High impedance state leakage to VTT
High impedance leakage to GND
Bus capacitance per node
N/A
N/A
50
10
10
—
µA
µA
2
2
4
Cbus
—
pF
Vnoise
Signal noise immunity above 300 MHz
0.1 * VTT
Vp-p
NOTE:
1.
2.
3.
4.
V
TT supplies the PECI interface. PECI behavior does not affect VTT min/max specifications.
The leakage specification applies to powered devices on the PECI bus.
The input buffers use a Schmitt-triggered input design for improved noise immunity.
One node is counted for each client and one node for the system host. Extended trace
lengths might appear as additional nodes.
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Datasheet
INTEL [ INTEL ]
