Electrical Specifications
2.8.4
BCLK[1:0] Specifications (CK505 based Platforms)
Table 17.
Front Side Bus Differential BCLK Specifications
Symbol
Parameter
Min
Typ
Max
Unit Figure Notes1
VL
Input Low Voltage
Input High Voltage
-0.30
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1.2
N/A
1.15
0.550
0.140
1.4
V
V
3
3
4
VH
4
VCROSS(abs) Absolute Crossing Point
0.300
N/A
V
3, 4
3, 4
3
2,4,6
ΔVCROSS Range of Crossing Points
V
-
VOS
VUS
Overshoot
N/A
V
5
5
6
Undershoot
-0.300
0.300
-5
N/A
V
3
VSWING
ILI
Differential Output Swing
Input Leakage Current
Pad Capacitance
N/A
V
5
5
μA
pF
Cpad
.95
1.45
8
1.
2.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
Crossing voltage is defined as the instantaneous voltage value when the rising edge of
BCLK0 equals the falling edge of BCLK1.
3.
4.
5.
VHavg is the statistical average of the VH measured by the oscilloscope.
"Steady state" voltage, not including overshoot or undershoot.
Overshoot is defined as the absolute value of the maximum voltage. Undershoot is defined
as the absolute value of the minimum voltage.
6.
7.
Measurement taken from differential waveform.
The crossing point must meet the absolute and relative crossing point specifications
simultaneously.
8.
Cpad includes die capacitance only. No package parasitics are included.
Figure 3.
Differential Clock Waveform
CLK 0
VCROSS Max
500 mV
VCROSS
Median + 75 mV
VCROSS
VCROSS
median
median
VCROSS
VCROSS Min
300 mV
Median - 75 mV
CLK 1
High Time
Low Time
Period
30
Datasheet
INTEL [ INTEL ]
