DDR MemBIST
11.5
MemBIST Implementation
11.5.1
MemBIST Block Diagram
Figure 11-6. MemBIST Block Diagram
GB MemBist Internal block diagram
mb_raddr/mb_caddr/mb_baddr/mb_cs
mcre2mcmb_cntl_req
mbist_cmd_l[2:0]
mbaddr[31:0]
mtr
mcsr2mcmb_rst_req
mbcsr[31:0]
mbcsr[31:0]
drt/drc
start_addr/end_addr
Command
raddr/caddr/baddr
raddr/caddr/baddr
Control
readcmd
Address
Generator
cs
mbcavail
mbstart
writecmd
tstinit
CS
FSM
readcmd
writecmd
Cycle
Tracker
read_idle
write_idle
dataput
dcget
MemBist
Flow
Control
Dataput
Generator
* Refresh logic is implemented outside
of MCMB block.
rdstart/wrstart
tstcompare
Embedded
Algorithm
Data
Tracker
tstdone
wrpattern
data_reset
mbdata[319:0]
mbcsr[31:0]
late_write_data[71:0]
early_write_data[71:0]
early_read_data[71:0]
late_read_data[71:0]
Rev 3.0 05/22/04
138
Intel® 6400/6402 Advanced Memory Buffer Datasheet
INTEL [ INTEL ]
