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300834 参数 Datasheet PDF下载

300834图片预览
型号: 300834
PDF下载: 下载PDF文件 查看货源
内容描述: 双核英特尔​​®至强®处理器 [Dual-Core Intel Xeon Processor]
分类和应用:
文件页数/大小: 104 页 / 3687 K
品牌: INTEL [ INTEL ]
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Features  
RESET# will cause the processor to immediately initialize itself, but the processor will  
stay in Stop-Grant state. A transition back to the Normal state will occur with the de-  
assertion of the STPCLK# signal.  
A transition to the Grant Snoop state will occur when the processor detects a snoop on  
the front side bus (see Section 7.2.4.1).  
While in the Stop-Grant state, SMI#, INIT#, BINIT# and LINT[1:0] will be latched by  
the processor, and only serviced when the processor returns to the Normal state. Only  
one occurrence of each event will be recognized upon return to the Normal state.  
While in Stop-Grant state, the processor will process snoops on the front side bus and it  
will latch interrupts delivered on the front side bus.  
The PBE# signal can be driven when the processor is in Stop-Grant state. PBE# will be  
asserted if there is any pending interrupt latched within the processor. Pending  
interrupts that are blocked by the EFLAGS.IF bit being clear will still cause assertion of  
PBE#. Assertion of PBE# indicates to system logic that it should return the processor to  
the Normal state.  
7.2.4  
Enhanced HALT Snoop or HALT Snoop State,  
Stop Grant Snoop State  
The Enhanced HALT Snoop state is used in conjunction with the Enhanced HALT state.  
If the Enhanced HALT state is not enabled in the BIOS, the default Snoop state entered  
will be the HALT Snoop state. Refer to the sections below for details on HALT Snoop  
state, Stop Grant Snoop state and Enhanced HALT Snoop state.  
7.2.4.1  
HALT Snoop State, Stop Grant Snoop State  
The processor will respond to snoop or interrupt transactions on the front side bus  
while in Stop-Grant state or in HALT Power Down state. During a snoop or interrupt  
transaction, the processor enters the HALT/Grant Snoop state. The processor will stay  
in this state until the snoop on the front side bus has been serviced (whether by the  
processor or another agent on the front side bus) or the interrupt has been latched.  
After the snoop is serviced or the interrupt is latched, the processor will return to the  
Stop-Grant state or HALT Power Down state, as appropriate.  
7.2.4.2  
7.3  
86  
Enhanced HALT Snoop State  
The Enhanced HALT Snoop state is the default Snoop state when the Enhanced HALT  
state is enabled via the BIOS. The processor will remain in the lower bus ratio and VID  
operating point of the Enhanced HALT state.  
While in the Enhanced HALT Snoop state, snoops and interrupt transactions are  
handled the same way as in the HALT Snoop state. After the snoop is serviced or the  
interrupt is latched, the processor will return to the Enhanced HALT state.  
Enhanced Intel SpeedStep® Technology  
The Dual-Core Intel Xeon Processor 5000 series support Enhanced Intel SpeedStep  
Technology. This technology enables the processor to switch between multiple  
frequency and voltage points, which results in platform power savings. Enhanced Intel  
SpeedStep Technology requires support for dynamic VID transitions in the platform.  
Switching between voltage/frequency states is software controlled.  
Dual-Core Intel® Xeon® Processor 5000 Series Datasheet