Electrical Specifications
affect the long term reliability of the processor. For further information and design guidelines, refer
to the Mobile Intel Pentium 4 Processor-M and Intel 845MP/845MZ Chipset Platform Design
Guide.
2.3.1
V
Decoupling
CC
Regulator solutions need to provide bulk capacitance with a low Effective Series Resistance (ESR)
and keep a low interconnect resistance from the regulator to the socket. Bulk decoupling for the
large current swings when the part is powering on, or entering/exiting low-power states, must be
provided by the voltage regulator solution. For more details on decoupling recommendations,
please refer to the Mobile Intel Pentium 4 Processor-M and Intel 845MP/845MZ Chipset
Platform Design Guide.
2.3.2
2.3.3
System Bus AGTL+ Decoupling
The Mobile Intel Pentium 4 Processor-M integrates signal termination on the die and incorporates
high frequency decoupling capacitance on the processor package. Decoupling must also be
provided by the system motherboard for proper AGTL+ bus operation. For more information, refer
to the Mobile Intel Pentium 4 Processor-M and Intel 845MP/845MZ Chipset Platform Design
Guide.
System Bus Clock (BCLK[1:0]) and Processor Clocking
BCLK[1:0] directly controls the system bus interface speed as well as the core frequency of the
processor. As in previous generation processors, the Mobile Intel Pentium 4 Processor-M core
frequency is a multiple of the BCLK[1:0] frequency. Refer to Table 2 for the Mobile Intel Pentium
4 Processor-M supported ratios.
Table 2. Core Frequency to System Bus Multipliers
Multiplication of System Core Frequency
Core Frequency
Notes2
to System Bus Frequency
800 MHz
1.2 GHz
1.4 GHz
1.5 GHz
1.6 GHz
1.7 GHz
1.8 GHz
1.9 GHz
2.0 GHz
2.2 GHz
2.4 GHz
2.5 GHz
2.6 GHz
1/8
1
1/12
1/14
1/15
1/16
1/17
1/18
1/19
1/20
1/22
1/24
1/25
1/26
NOTES:
1. Ratio is used for debug purposes only.
14
Mobile Intel Pentium 4 Processor-M Datasheet
INTEL [ INTEL ]
