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10M08SAU169C8G 参数 Datasheet PDF下载

10M08SAU169C8G图片预览
型号: 10M08SAU169C8G
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, PBGA169, 11 X 11 MM, 0.80 MM PITCH, ROHS COMPLIANT, UBGA-169]
分类和应用: 时钟可编程逻辑
文件页数/大小: 68 页 / 976 K
品牌: INTEL [ INTEL ]
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M10-DATASHEET  
2015.05.04  
13  
Hot-Socketing Specifications  
Hot-Socketing Specifications  
Table 17: Hot-Socketing Specifications for MAX 10 Devices—Preliminary  
Symbol  
Parameter  
Maximum  
IIOPIN(DC)  
IIOPIN(AC)  
DC current per I/O pin  
AC current per I/O pin  
300 µA  
8 mA (13)  
Hysteresis Specifications for Schmitt Trigger Input  
MAX 10 devices support Schmitt trigger input on all I/O pins. A Schmitt trigger feature introduces hysteresis to the input signal for improved  
noise immunity, especially for signal with slow edge rate.  
Table 18: Hysteresis Specifications for Schmitt Trigger Input for MAX 10 Devices—Preliminary  
Symbol  
Parameter  
Condition  
Minimum  
180  
Unit  
mV  
mV  
mV  
mV  
VCCIO = 3.3 V  
VCCIO = 2.5 V  
VCCIO = 1.8 V  
VCCIO = 1.5 V  
150  
VHYS  
Hysteresis for Schmitt trigger input  
120  
110  
(13)  
The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.  
MAX 10 FPGA Device Datasheet  
Send Feedback  
Altera Corporation  
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