A10-DATASHEET
2015.12.31
11
I/O Pin Leakage Current
I/O Pin Leakage Current
Table 7: I/O Pin Leakage Current for Arria 10 Devices—Preliminary
If VO = VCCIO to VCCIOMAX, 300 μA of leakage current per I/O is expected.
Symbol
Description
Condition
Min
–80
–80
Max
80
Unit
µA
II
Input pin
Tri-stated I/O pin
VI = 0 V to VCCIOMAX
VO = 0 V to VCCIOMAX
IOZ
80
µA
Bus Hold Specifications
The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
Table 8: Bus Hold Parameters for Arria 10 Devices—Preliminary
VCCIO (V)
Parameter
Symbol Condition
1.2
1.5
1.8
2.5
3.0
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Bus-hold,
low,
ISUSL
VIN > VIL
(max)
8 (18)
,
—
12 (18)
,
—
30 (18)
,
—
60
—
70
—
µA
µA
µA
26 (19)
32 (19)
55 (19)
sustaining
current
Bus-hold,
high,
ISUSH VIN < VIH –8 (18)
,
—
–12 (18)
,
—
–30 (18)
,
—
–60
—
—
–70
—
—
(min)
–26 (19)
–32 (19)
–55 (19)
sustaining
current
Bus-hold,
low,
IODL
0 V < VIN
< VCCIO
—
125
—
175
—
200
300
500
overdrive
current
(18)
This value is only applicable for LVDS I/O bank.
This value is only applicable for 3 V I/O bank.
(19)
Arria 10 Device Datasheet
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