A10-DATASHEET
2015.12.31
Transceiver Power Supply Operating Conditions
7
Symbol
Description
Condition
(12)
Minimum
(13)
Typical
Maximum
Unit
Chip-to-Chip ≤ 17.4 Gbps
Or
V
CCR_GXB[L,R]
Receiver power supply
Backplane
(14)
≤ 16.0 Gbps
Chip-to-Chip ≤ 11.3 Gbps
Or
Backplane
(14)
≤ 10.3125 Gbps
V
CCH_GXB[L,R]
Transceiver high voltage
power
—
1.0
1.03
1.06
V
0.92
0.95
0.98
V
1.710
1.8
1.890
V
Note:
Most VCCR_GXB and VCCT_GXB pins associated with unused transceiver channels can be grounded on a per-side basis to minimize
power consumption. Refer to the
Arria 10 GX, GT, and SX Device Family Pin Connection Guidelines
and the Quartus Prime pin report for
information about pinning out the package to minimize power consumption for your specific design.
(12)
(13)
These data rate ranges vary depending on the transceiver speed grade. Refer to Transceiver Performance for Arria 10 GX/SX Devices for exact data
rate ranges.
This value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements. Refer to the
PDN tool for the additional budget for the dynamic tolerance requirements.
Altera Corporation
Arria 10 Device Datasheet
INTEL [ INTEL CORPORATION ]
