欢迎访问ic37.com |
会员登录 免费注册
发布采购

IA88C00 参数 Datasheet PDF下载

IA88C00图片预览
型号: IA88C00
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontroller]
分类和应用: 微控制器
文件页数/大小: 80 页 / 674 K
品牌: INNOVASIC [ INNOVASIC, INC ]
 浏览型号IA88C00的Datasheet PDF文件第34页浏览型号IA88C00的Datasheet PDF文件第35页浏览型号IA88C00的Datasheet PDF文件第36页浏览型号IA88C00的Datasheet PDF文件第37页浏览型号IA88C00的Datasheet PDF文件第39页浏览型号IA88C00的Datasheet PDF文件第40页浏览型号IA88C00的Datasheet PDF文件第41页浏览型号IA88C00的Datasheet PDF文件第42页  
IA88C00  
Data Sheet  
Microcontroller  
As of Production Version -01  
D0 - Handshake Enable - When this bit is set to 1, the handshake function is enabled.  
D1 - Port Select - This bit selects which port is controlled by Handshake Channel 0. When it is set to 1,  
Port 1 is selected and when it is cleared to 0, Port 4 is selected.  
D2 - DMA Enable - When this bit is set to 1, the DMA function is enabled for Handshake Channel 0.  
When it is cleared to 0, the DMA function is not used by the handshake channel and may be used by the  
UART.  
D3 - Mode - When this bit is set to 1, the "fully interlocked" mode is enabled. When it is cleared to 0, the  
"strobed" mode is enabled.  
D4-D7 - Deskew Counter - This 4-bit field is used to select a count value from 1 to 16 (0000-1111). This  
value is the number of processor clocks used to generate the set-up and strobe when using the "strobed"  
mode, or the set-up when using the "fully-interlocked" mode.  
Figure 37. Handshake 1 Control (H1C), R245 Bank 0  
Bit  
7
D7  
6
D6  
5
D5  
4
D4  
3
D3  
2
D2  
1
D1  
0
D0  
Initial Value  
Read/Write  
X
W/O  
X
W/O  
X
W/O  
X
W/O  
X
W/O  
X
W/O  
X
W/O  
0
W/O  
This register controls Handshake Channel 1.  
D0 - Handshake Enable - When this bit is set to 1, the handshake function is enabled.  
D1 - Not Used.  
D2 - Not Used.  
D3 - Mode - When this bit is set to 1, the "fully interlocked" mode is enabled. When it is cleared to 0, the  
"strobed" mode is enabled.  
D4-D7 - Deskew Counter - This 4-bit field is used to select a count value from 1 to 16 (0000-1111). This  
value is the number of processor clocks used to generate the set-up and strobe when using the "strobed"  
mode, or the set-up when using the "fully-interlocked" mode.  
Figure 38. Port 4 Direction Control Register (P4D), R246 Bank 0  
Bit  
7
D7  
6
D6  
5
D5  
4
D4  
3
D3  
2
D2  
1
D1  
0
D0  
Initial Value  
Read/Write  
1
R/W  
1
R/W  
1
R/W  
1
R/W  
1
R/W  
1
R/W  
1
R/W  
1
R/W  
Copyright 2005  
ENG 21 0 050519-00  
www.Innovasic  
1.888.824.4184  
Innovasic.com  
Innovasic Semiconductor  
Page 38 of 80  
 复制成功!