IA88C00
Data Sheet
Microcontroller
As of Production Version -01
Figure 26. Counter 1 Capture Register (Low Byte) (C1CL), R229 Bank 0
Bit
7
D7
6
D6
5
D5
4
D4
3
D3
2
D2
1
D1
0
D0
C1C7 – C1C0
Initial Value
Read/Write
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
This 16-bit register pair is used to hold the counter value saved when using the "capture on external
event" function. This register will capture at the rising edge of the I/O pin or when software capture is
asserted. When the bi-value mode of operation is enabled, this register is used as a second Time Constant
register and the counter is alternately loaded from each.
Figure 27a. Counter 0 Prescaler (CTPRS), R230 Bank 0
Bit
7
D7
6
5
D5
4
D4
3
D3
2
D2
1
0
D0
D6
CT1
0
D1
CT0
0
Not Used
Initial Value
Read/Write
0
R/W
1
R/W
0
R/W
0
R/W
0
R/W
1
R/W
R/W
R/W
This register controls the source of the timer signal when in internal mode. An 8-bit prescaler for each
counter is implemented. The control bit operate as follows:
CT0/CT1
000
Prescale
XTAL/2
XTAL/4
001
XTAL/8
010
XTAL/16
XTAL/32
XTAL/64
XTAL/128
XTAL/256
011
100
101
110
111
Only the prescaler of CT1 is activated when the counters are cascaded.
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Innovasic Semiconductor
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