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IA8344-PLC44I-01 参数 Datasheet PDF下载

IA8344-PLC44I-01图片预览
型号: IA8344-PLC44I-01
PDF下载: 下载PDF文件 查看货源
内容描述: SDLC通信控制器 [SDLC COMMUNICATIONS CONTROLLER]
分类和应用: 通信控制器外围集成电路装置时钟
文件页数/大小: 49 页 / 218 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA8044/IA8344  
SDLC COMMUNICATIONS CONTROLLER  
Data Sheet  
ISSUE:  
Port2 buffer bits set high are not actively driven when executing a MOVX A,@Ri or  
a MOVX @Ri,A instruction. During these instructions any bit that was driven low  
by the previous value on Port2 but is high in the Port2 buffer will not reach a valid  
high level before ALE goes low.  
SOLUTION: Avoid the use of these instructions or add strong pullups (approximately 10K) to  
Port2 externally.  
ISSUE:  
Race condition on transmit response in AUTO mode causes bad control byte to be  
transmitted..  
SOLUTION: In firmware wait for RTS=1 before telling transmit to start.  
ISSUE:  
Device does not sense the end of buffer during a receive.  
SOLUTION: No workaround available.  
ISSUE:  
Receiving continuous flags (7Eh) while in loop mode will not allow a slave device to  
transmit. The device is only able to transmit when the line is idle.  
SOLUTION: Do not send continuous flags.  
Version 00/P01:  
ISSUE:  
The following registers change value after an external reset, STAD, TBS, TBL, TCB,  
RBS, RBL, RFL, and RCB. These registers should retain there pre-reset values.  
SOLUTION: Store register values in memory (internal or external) to be restored after reset.  
ISSUE:  
Device may miss external interrupts with narrow pulse widths when in edge sensitive  
mode and tight software loops that check TCON.  
SOLUTION: Place NOPs in loop to allow time to capture interrupt..  
ISSUE:  
Intermittent drop out in slave mode, followed by normal operation. Dropouts can  
be caused by either noise on the reset pin or XTAL1 being unconnected when using  
a clock source.  
SOLUTION: Filter reset if necessary. Ensure that XTAL1 is tied low when using a clock source.  
ISSUE:  
When used as a slave in loop mode the device may misinterpret a byte due to an  
internal bit counter error. This may cause the device to think it has seen a go-ahead  
and can transmit when it actually should not transmit.  
SOLUTION: No workaround available.  
ISSUE: If the synchronous mode is used (external SCLK is provided), gating off the SCLK  
may cause the device to communicate erratically. Depending on when the SCLK is  
gated off the SIU may not have finished its present task. When the SCLK is  
restarted the device may not respond to communications.  
SOLUTION: Do not gate off the external SCLK.  
Copyright 2003  
innovASIC  
ENG210010112-00  
www.innovasic.com  
Customer Support:  
1-888-824-4184  
The End of Obsolescence  
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