IA82510
Data Sheet
ASYNCHRONOUS SERIAL CONTROLLER
As of Production Ver. 01
DESCRIPTION
The IA82510 is an asynchronous serial controller that provides a CPU interface to one transmit
and one receive channel. It is Form, Fit, and Function compatible with the Intel 82510.
Configuration registers are used to control the serial channel, interrupts, and modes of operation.
The CPU controls this device via address and data lines with read/write control. The CPU also
uses this interface to read and write data to receive and transmit data through the serial channel.
FIFOs and various serial modes can be used to help off-load the CPU from transmitting and
receiving data. An interrupt line provides an indication to the CPU that the device requires
servicing. The device can be configured for 8250A/16450 compatibility.
Functional Block Diagram
IA82510
A(2:0)
TRANSMITTER
D(7:0)
RDn
TXD
BUS INTERFACE
(Reset Logic,
Registers,
Interrupt Generation,
WRn
CSn
INT
RESET
RECEIVER
RXD
CTSn
RTSn
TIMING
(Baud Rate
PIN
Generators A & B,
Clocking
CONFIGURATION
CONFIG., STATUS, RXDATA
DSRn or TA or OUT0n
DCDn or ICLK or OUT1n
DTRn or TB
MODEM
X1 or CLK
X2 or OUT2n
SCLK or RIn
Copyright
innovASIC
2001
ENG211001219-01
www.innovasic.com
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