Page 13 of 17
IA59032
Data Sheet
32-Bit High Speed Microprocessor Slice
CYCLE TIME AND CLOCK CHARACTERISTICS:
60ns
READ-MODIFY-WRITE (from select of A, B
registers to end of cycle)
23.6 MHz
Maximum Clock Frequency to Shift Q (50% duty
cycle, I=432 or 632)
28ns
30ns
60ns
Minimum Clock Low Time
Minimum Clock High
Minimum Clock Period
OUTPUT ENABLE/DISABLE TIME:
From OEn LOW to Y output enable
From OEn HIGH to Y output enable
36ns
30ns
COMBINATIONAL PROPAGATION DELAYS (Cl = 50 pf):
To Output
Y
F31 Cn+32 FZERO OVR RAM0, Q0, UNITS
RAM31 Q31
From A,B Address 66 68 58
66
45
36
62
35
32
75
48
42
--
--
--
Input
D(31:0)
Cn
45 45 35
36 36 18
I(2:0)
I(5:3)
I(8:6)
A Bypass
ALU
46 46 35
51 51 41
46
51
--
41
46
--
58
53
22
--
--
--
20
--
ns
22 --
48 --
--
--
--
--
(I=2XX)
Clock
51 51 42
51
48
59
22
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innovASIC
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