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IA2910A_08 参数 Datasheet PDF下载

IA2910A_08图片预览
型号: IA2910A_08
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microprogram Controller]
分类和应用: 微控制器
文件页数/大小: 21 页 / 681 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA2910A  
Data Sheet  
Microprogram Controller  
August 19, 2008  
I/O Signal Description  
Table 1 below describes the I/O characteristics for each signal on the IC. The signal names  
correspond to the signal names on the pinout diagrams provided.  
Symbol  
CLK  
Type Description  
I
I
I
I
I
I
Clock Input - Clock source for address register, microprogram  
counter register, and stack file.  
I(3:0)  
CCn  
Active high instruction bits. Selects instruction to be executed by the  
IA2910A.  
Active low. Condition code. Used as test criterion, pass is low on  
CCn.  
CCENn  
RLDn  
OEn  
Active low. Condition code enable. When set high, CCn is ignored  
and the IA2910A operates as it CCn were a low.  
Active low. Clock enable to address register, allows loading of  
register/counter regardless of instruction or condition.  
Active low. Output enable, when high tri-states the output bus  
YOUT.  
CIN  
FULLn  
I
Active high. Carry in signal to the incrementer.  
Active low. Indicates there are nine items on the stack.  
Active high. Data bus input to the multiplexer.  
Active high. Data bus output from the IA2910A.  
O
I
DIN(11:0)  
YOUT(11:0)  
PLn  
O
O
Active low. Pipeline address enable. Selects source number one  
(usually pipeline register) as direct input source.  
MAPn  
O
O
Active low. Map address enable. Selects source number two (usually  
mapping PROM or PLA) as direct input source.  
VECTn  
Active low. Vector address enable. Selects source number three  
(usually interrupt starting address) as direct input source.  
Table 1  
IA211030314-03  
http://www.Innovasic.com  
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