IA186ER/IA188ER
Data Sheet
16-Bit/8-Bit Microcontrollers with RAM
February 25, 2013
7.1.8 Segment Register
The segment register is shown below.
SR Segment Register
00 ES
01 CS
10 SS
11 DS
7.2
Explanation of Notation Used in Instruction Set Summary Table
Notation used in the Instruction Set Summary Table is explained below.
Parameter Indication
:
The component of the left is the segment for a component
located in memory. The component on the right is the
offset.
::
The component of the left is concatenated with the
component on the right.
Operand Definition
imm8
imm16
m
Immediate byte: signed number between –128 and 127
Immediate word: signed number between –32768 and 32767
Operand in memory
m8
Byte string in memory pointed to by DS:SI or ES:DI
Word string in memory pointed to by DS:SI or ES:DI
General byte register or a byte in memory
General word register or a word in memory
m16
r/m8
r/m16
7.2.1 Opcode
Opcode parameters and definitions are provided below.
Parameter Definition
/0 - /7
The Auxiliary Field in the Operand Address byte specifies an extension (from 000 to 111,
i.e., 0 to 7) to the opcode instead of a register. Thus, the opcode for adding (AND) an
immediate byte to a general byte register or a byte in memory is “80 /4 ib.” This indicates
that the second byte of the opcode is “mod 100 r/m.”
/r
The Auxiliary Field in the Operand Address byte specifies a register rather that an opcode
extension. The opcode byte specifies which register, either byte size or word size, is
assigned as in the aux code above.
/sr
This byte is placed before the instruction as shown in Section 7.1.7, Segment Override
Prefix.
cb
cd
The byte following the Opcode byte specifies the offset.
The double word following the Opcode byte specifies the offset and a segment.
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