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AM188ES-33VIW 参数 Datasheet PDF下载

AM188ES-33VIW图片预览
型号: AM188ES-33VIW
PDF下载: 下载PDF文件 查看货源
内容描述: 8位/ 16位微控制器 [8-Bit/16-Bit Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 154 页 / 1714 K
品牌: INNOVASIC [ INNOVASIC, INC ]
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IA186ES/IA188ES  
Data Sheet  
8-Bit/16-Bit Microcontrollers  
November 15, 2011  
With the exception of int0, the seven external maskable interrupt request pins are  
multifunctional. One function is for direct-interrupt requests. The int6 and int5 are edge-  
triggered. The int4int0 may be either level- or edge-triggered.  
When configured in cascade mode, int1 and int0 interface with an external 82C59A-type  
interrupt controller. When int0 is configured for cascade mode, the function of int2 is  
automatically switched to its inta0_n role. Similarly, when int1 is configured for cascade mode,  
int3 is switched to its inta1_n role. An external 82C59A-compatible interrupt controller may be  
used as the system master by programming the internal interrupt controller to slave mode, but  
int6int4 cannot be used.  
Although other interrupts are disabled when another is accepted, these may be re-enabled by  
setting the Interrupt Enable Flag (IF) in the Processor Status Flags register during the Interrupt  
Service Routine (ISR). Setting IF permits interrupts of equal or greater priority to interrupt the  
currently running ISR.  
Further interrupts from the same source will be blocked until the corresponding bit in the In-  
Service (INSERV) register is cleared. When set to 1, the Special Fully Nested mode (SFNM) is  
invoked for int0 and int1 in the INT0 and INT1 Control registers, respectively. In this mode, a  
new interrupt may be generated by these sources regardless of the in-service bit. The following  
table shows the priorities of the interrupts at POR.  
4.17 Interrupt Types  
Table 14 presents interrupt names, types, vector table address, End-of-Interrupt (EOI) type,  
overall priority, and related instructions.  
Table 14. Interrupt Types  
Vector  
Interrupt  
Type  
Table  
Address  
EOI  
Type  
Overall  
Priority  
Related  
Instructions  
Interrupt Name  
a
00h  
01h  
02h  
03h  
04h  
05h  
06h  
00h  
04h  
08h  
0ch  
10h  
14h  
18h  
NA  
NA  
NA  
NA  
NA  
NA  
NA  
1
1A  
1B  
1
DIV, IDIV  
All  
Divide Error Exception  
b
Trace Interrupt  
Non-maskable Interrupt (NMI)  
a
INT3  
INT0  
BOUND  
Breakpoint Interrupt  
b
1
INT0 Detected Overflow Exception  
a
1
Array Bounds Exception  
a
1
Undefined  
Opcodes  
Unused Opcode Exception  
a,b  
07h  
08h  
12h  
1ch  
20h  
48h  
NA  
08h  
08h  
1
ESC Opcodes  
ESC Opcode Exception  
d,e  
2A  
2B  
Timer0 Interrupt  
d,e  
Timer1 Interrupt  
®
IA211050902-19  
UNCONTROLLED WHEN PRINTED OR COPIED  
http://www.innovasic.com  
Customer Support:  
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