XMC4500
XMC4000 Family
Electrical Parameters
3.3.12.3 ETH MII Parameters
In the following, the parameters of the MII (Media Independent Interface) are described.
Table 59
ETH MII Signal Timing Parameters
Symbol Values
Typ. Max.
Parameter
Unit Note /
Test Condition
Min.
Clock period, 10 Mbps
Clock high time, 10 Mbps
Clock low time, 10 Mbps
Clock period, 100 Mbps
Clock high time, 100 Mbps
Clock low time, 100 Mbps
Input setup time
t7
SR 400
SR 140
SR 140
SR 40
SR 14
SR 14
SR 10
–
–
–
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
CL = 25 pF
t8
260
260
–
t9
t7
t8
26
26
–
t9
t10
t11
t12
Input hold time
SR 10
–
Output valid time
CC 0
25
t7
t9
t8
ETH_MII_RX_CLK
ETH_MII_TX_CLK
ETH_MII_RX_CLK
t10
t11
ETH_MII_RXD[3:0]
ETH_MII_RX_DV
ETH_MII _RX_ER
Valid Data
(sourced by PHY )
ETH_MII_TX_CLK
t12
ETH_MII _TXD[3:0]
ETH_MII_TXEN
Valid Data
(sourced by STA )
ETH_Timing-MII.vsd
Figure 40
ETH MII Signal Timing
Data Sheet
105
V1.0, 2013-01
Subject to Agreement on the Use of Product Information
INFINEON [ Infineon ]
