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TLE9879QXA40 参数 Datasheet PDF下载

TLE9879QXA40图片预览
型号: TLE9879QXA40
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller with LIN and BLDC MOSFET Driver for Automotive Applications]
分类和应用: 微控制器
文件页数/大小: 122 页 / 4340 K
品牌: INFINEON [ Infineon ]
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TLE9879QXA40  
General Purpose Timer Units (GPT12)  
15  
General Purpose Timer Units (GPT12)  
15.1  
Features  
15.1.1  
Features Block GPT1  
The following list summarizes the supported features:  
fGPT/4 maximum resolution  
3 independent timers/counters  
Timers/counters can be concatenated  
4 operating modes:  
– Timer Mode  
– Gated Timer Mode  
– Counter Mode  
– Incremental Interface Mode  
Reload and Capture functionality  
Shared interrupt: Node 0  
15.1.2  
Features Block GPT2  
The following list summarizes the supported features:  
fGPT/2 maximum resolution  
2 independent timers/counters  
Timers/counters can be concatenated  
3 operating modes:  
– Timer Mode  
– Gated Timer Mode  
– Counter Mode  
Extended capture/reload functions via 16-bit capture/reload register CAPREL  
Shared interrupt: Node 1  
15.2  
Introduction  
The General Purpose Timer Unit blocks GPT1 and GPT2 have very flexible multifunctional timer structures which  
may be used for timing, event counting, pulse width measurement, pulse generation, frequency multiplication, and  
other purposes.  
They incorporate five 16-bit timers that are grouped into the two timer blocks GPT1 and GPT2. Each timer in each  
block may operate independently in a number of different modes such as Gated timer or Counter Mode, or may  
be concatenated with another timer of the same block.  
Each block has alternate input/output functions and specific interrupts associated with it. Input signals can be  
selected from several sources by register PISEL.  
The GPT module is clocked with clock fGPT. fGPT is a clock derived from fSYS  
.
Data Sheet  
52  
Rev. 1.0, 2015-04-30  
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