TLE 6244X
1.9 Timing Diagram of the Power Outputs
1.9.1 Power Stages
UINi
UINiH
UINiL
t
UOUTi
UCLi
0.8UCLi*)
soff
UBATT
0.8UBATT
son
0.2UCLi
0.2UBATT
t
tson
tsoff
tdon
tdoff
If the output is controlled via SPI the timing starts with the positive slope at SS
If the output is controlled by the µsec-bus, the timing starts with the pos. slope of SSY
*) With ohmic load, UCLi = UBatt
Final Data Sheet
33
V4.2, 2003-08-29