TDA5235
Appendix
Register Description
ꢀ
ꢁ
&/.287ꢁ
Z
Field
CLKOUT1
Bits
Type
Description
7:0
w
Clock Out Divider: CLKOUT(19:0) = CLKOUT2(MSB) & CLKOUT1 &
CLKOUT0(LSB)
Min: 00002h = Clock divided by 2*2
Max: FFFFFh = Clock divided by ((2^20)-1)*2
Reg. value 00000h = Clock divided by (2^20)*2
Reset: 00H
Clock Divider Register 2
CLKOUT2
Offset
088H
Reset Value
00H
Clock Divider Register 2
ꢀ
ꢄ
ꢅ
ꢁ
8186('
&/.287ꢂ
ꢂ
Z
Field
Bits
Type
Description
UNUSED
7:4
-
UNUSED
Reset: 0H
CLKOUT2
3:0
w
Clock Out Divider: CLKOUT(19:0) = CLKOUT2(MSB) & CLKOUT1 &
CLKOUT0(LSB)
Min: 00002h = Clock divided by 2*2
Max: FFFFFh = Clock divided by ((2^20)-1)*2
Reg. value 00000h = Clock divided by (2^20)*2
Reset: 0H
RF Control Register
RFC
Offset
089H
Reset Value
07H
RF Control Register
Data Sheet
232
V1.0, 2010-02-19
INFINEON [ Infineon ]
