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TDA5235 参数 Datasheet PDF下载

TDA5235图片预览
型号: TDA5235
PDF下载: 下载PDF文件 查看货源
内容描述: 增强灵敏度双配置接收器,具有数字基带处理 [Enhanced Sensitivity Double-Configuration Receiver with Digital Baseband Processing]
分类和应用:
文件页数/大小: 259 页 / 6799 K
品牌: INFINEON [ Infineon ]
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TDA5235  
Functional Description  
2.7  
Definitions  
2.7.1  
Definition of Bit Rate  
The definition for the bit rate in the following description is:  
symbols  
bitrate = ---------------------  
s
If a symbol contains n chips (for Manchester n=2; for NRZ n=1) the chip rate is n times  
the bit rate:  
chiprate = n × bitrate  
2.7.2  
Definition of Manchester Duty Cycle  
Several different definitions for the Manchester duty cycle (MDC) are in place. To avoid  
wrong interpretation some of the definitions are given below.  
Level-based Definition  
MDC = Duration of H-level / Symbol period  
bit = 1  
1
0
0
1
1. chip  
2. chip  
Tbit  
T
chip  
MDC < 50%  
0
1
1
0
1
ΔT  
TH  
TH  
T
Tbit  
Tbit  
chip  
MDC > 50%  
ΔT  
TH  
TH  
T
Tbit  
Tbit  
chip  
Figure 88  
Definition A: Level-based definition  
This definition determinates the duty cycle to be the ratio of the high pulse width and the  
ideal symbol period. The DC content is constant and directly proportional to the specified  
duty cycle.  
For ΔT > 0 the high period is longer than the chip-period and for ΔT < 0 the high period  
is shorter than the chip-period.  
Data Sheet  
123  
V1.0, 2010-02-19  
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