欢迎访问ic37.com |
会员登录 免费注册
发布采购

SAK-TC399XP-256F300S BC 参数 Datasheet PDF下载

SAK-TC399XP-256F300S BC图片预览
型号: SAK-TC399XP-256F300S BC
PDF下载: 下载PDF文件 查看货源
内容描述: [Infineon releases its second generation AURIX microcontroller in embedded flash 40 nm technology. It comes back with an increase in performance, memory sizes, connectivity and more scalability to address the new automotive trends and challenges. This family has more than 20 products to provide the most scalable portfolio of safety microcontrol­ler. In terms of performance, the highest end product TC39x offers 6 cores running at 300 MHz and up to 6.9 MBytes embedded RAM, and consuming below 2 W. ]
分类和应用:
文件页数/大小: 548 页 / 21256 K
品牌: INFINEON [ Infineon ]
 浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第182页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第183页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第184页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第185页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第187页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第188页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第189页浏览型号SAK-TC399XP-256F300S BC的Datasheet PDF文件第190页  
TC39x BC/BD-Step  
Pin Definition and Functions: LFBGA-292 Package Variant Pin Configuration  
Table 2-26 Port 01 Functions (cont’d)  
Ball  
Symbol  
Ctrl. Buffer  
Type  
Function  
H5  
P01.5  
I
SLOW /  
PU1 /  
VEXT /  
ES  
General-purpose input  
Mux input channel 3 of TIM module 5  
Mux input channel 3 of TIM module 2  
Mux input channel 2 of TIM module 2  
Master SPI data input  
Modulator clock input, channel 8  
Receive input  
GTM_TIM5_IN3_2  
GTM_TIM2_IN3_7  
GTM_TIM2_IN2_7  
QSPI3_MRSTC  
EDSADC_DSCIN8A  
ASCLIN9_ARXA  
EVADC_G9CH12  
P01.5  
AI  
Analog input channel 12, group 9  
General-purpose output  
GTM muxed output  
O0  
O1  
O2  
O3  
O4  
GTM_TOUT113  
Reserved  
Reserved  
QSPI3_MRST  
IOM_MON2_3  
IOM_REF2_3  
Slave SPI data output  
Monitor input 2  
Reference input 2  
O5  
O6  
O7  
I
Reserved  
EDSADC_DSCOUT8  
Modulator clock output  
Reserved  
H4  
P01.6  
FAST /  
PU1 /  
VEXT /  
ES  
General-purpose input  
Mux input channel 6 of TIM module 5  
Mux input channel 5 of TIM module 5  
Mux input channel 5 of TIM module 2  
Slave SPI data input  
Digital datastream input, channel 8  
General-purpose output  
GTM muxed output  
GTM_TIM5_IN6_2  
GTM_TIM5_IN5_3  
GTM_TIM2_IN5_7  
QSPI3_MTSRC  
EDSADC_DSDIN8A  
P01.6  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
GTM_TOUT114  
Reserved  
ASCLIN9_ASCLK  
QSPI3_MTSR  
Shift clock output  
Master SPI data output  
Reserved  
Reserved  
Reserved  
Data Sheet  
186  
V 1.2, 2021-03  
OPEN MARKET VERSION  
 复制成功!