TC1767
Introduction
• An A/D Converter Stage responsible for the analog-to-digital conversion including an
input multiplexer to select between the channel amplifiers
• A Data Reduction Unit containing programmable anti-aliasing and data reduction
filters
• A Channel Trigger Control block determining the trigger and gating conditions for the
FADC channels
• A Channel Timer for each channel to independently trigger the conversions
• An A/D Control block responsible for the overall FADC functionality
FADC Power Supply and References
The FADC module is supplied by the following power supply and reference voltage lines:
• VDDMF / VSSMF: FADC Analog Channel Amplifier Power Supply (3.3 V)
• VDDIF / VSSMF: FADC Analog Input Stage Power Supply (3.3 - 5 V),
the VDDIF supply does not appear as supply pin, because it is internally connected to
the VDDM supply of the ADC that is sharing the FADC input pins.
• VDDAF / VSSAF: FADC Analog Part Power Supply (1.5 V),
to be fed in externally
• VFAREF / VFAGND: FADC Reference Voltage (3.3 V max.) and FADC Reference Ground
Input Structure
The input structure of the FADC in the TC1767 contains:
• A differential analog input stage for each input channel to select the input impedance
(differential or single-ended measurement) and to decouple the FADC input signal
from the pins.
• A channel amplifier for each input channel with a settling time (about 5µs) when
changing the characteristics of an input stage (changing between unused,
differential, single-ended N, or single-ended P mode).
Data Sheet
48
V1.3, 2009-09
INFINEON [ Infineon ]
