TC1767
Summary of Features
1
Summary of Features
• High-performance 32-bit super-scalar TriCore V1.3.1 CPU with 4-stage pipeline
– Superior real-time performance
– Strong bit handling
– Fully integrated DSP capabilities
– Single precision Floating Point Unit (FPU)
– 133 MHz operation at full temperature range
• 32-bit Peripheral Control Processor with single cycle instruction (PCP2)
– 8 Kbyte Parameter Memory (PRAM)
– 16 Kbyte Code Memory (CMEM)
– 133 MHz operation at full temperature range
• Multiple on-chip memories
– 72 Kbyte Data Memory (LDRAM)
– 24 Kbyte Code Scratchpad Memory (SPRAM)
– 2 Mbyte Program Flash Memory (PFlash)
– 64 Kbyte Data Flash Memory (DFlash, represents 16 Kbyte EEPROM)
– Instruction Cache: up to 8 Kbyte (ICACHE, configurable)
– Data Cache: up to 4 Kbyte (DCACHE, configurable)
– 8 Kbyte Overlay Memory (OVRAM)
– 16 Kbyte BootROM (BROM)
• 8-Channel DMA Controller
• Sophisticated interrupt system with 2 × 255 hardware priority arbitration levels
serviced by CPU or PCP2
• High performing on-chip bus structure
– 64-bit Local Memory Buses between CPU, Flash and Data Memory
– 32-bit System Peripheral Bus (SPB) for on-chip peripheral and functional units
– One bus bridge (LFI Bridge)
• Versatile On-chip Peripheral Units
– Two Asynchronous/Synchronous Serial Channels (ASC) with baud rate generator,
parity, framing and overrun error detection
– Two High-Speed Synchronous Serial Channels (SSC) with programmable data
length and shift direction
– One serial Micro Second Bus interface (MSC) for serial port expansion to external
power devices
– One High-Speed Micro Link interface (MLI) for serial inter-processor
communication
– One MultiCAN Module with 2 CAN nodes and 64 free assignable message objects
for high efficiency data handling via FIFO buffering and gateway data transfer
– One General Purpose Timer Array Modules (GPTA) with additional Local Timer
Cell Array (LTCA2) providing a powerful set of digital signal filtering and timer
functionality to realize autonomous and complex Input/Output management
• 32 analog input lines for ADC
Data Sheet
4
V1.3, 2009-09
INFINEON [ Infineon ]
