C167CR
AC Characteristics
CLKOUT and READY
VCC = 5 V ± 10 %;
VSS = 0 V
TA = 0 to +70 ˚C
for SAB-C167CR-LM
TA = -40 to +85 ˚C
for SAF-C167CR-LM
TA = -40 to +125 ˚C for SAK-C167CR-LM
CL (for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
CL (for Port 6, CS) = 100 pF
Parameter
Symbol
Max. CPU Clock
= 20 MHz
Variable CPU Clock
1/2TCL = 1 to 20 MHz
Unit
min.
max.
min.
max.
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
t29 CC 50
50
2TCL
TCL – 5
TCL – 10
–
2TCL
ns
ns
ns
ns
ns
ns
t30 CC
t31 CC
20
15
–
–
–
–
–
t32 CC
t33 CC
5
5
–
5
–
5
CLKOUT rising edge to
ALE falling edge
t34 CC 0 + tA
10 + tA
0 + tA
10 + tA
Synchronous READY
setup time to CLKOUT
t35 SR 15
–
–
–
–
–
0
15
–
ns
ns
ns
ns
ns
ns
Synchronous READY
hold time after CLKOUT
t36 SR
0
0
–
Asynchronous READY
low time
t37 SR 65
2TCL + 15
–
t58 SR
t59 SR
t60 SR
Asynchronous READY
15
0
15
0
–
1)
setup time
Asynchronous READY
hold time 1)
–
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)2)
0
0
TCL - 25
+ 2tA + tF
+ 2tA + tF
2)
2)
Notes
1)
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
2)
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2tA refer to the next following bus cycle.
Semiconductor Group
60