PEB 2091
PEF 2091
Overview
1.3
Logic Symbol for µP Mode
15.36 MHz **)
+5V
Reset
0V +5V
PMODE RES
CLS
GND VDD
XIN
XOUT
Clock
AOUT
BOUT
U
Interface
FSC*
DCL*
DOUT
DIN
PEB 2091
IEC-Q
µP Mode
AIN
BIN
®
IOM -2
Interface
PS1
PS2
Power
Supply
Control
SMODE RST
CS INT MCLK
AD0-AD7
ALE RD WR
parallel / serial
Siemens or Motorola
µP interface
*) FSC and DCL are
®
inputs in the IOM -2 Slave mode
and
®
outputs from the IOM -2 Master mode
**) Crystal or external clock on XIN
Figure 1
Logic Symbol for µP Mode
Semiconductor Group
21
Data Sheet 01.99