PEB 2091
PEF 2091
Overview
• µP access to all data and control channels of the IOM®-2 interface
• Adjustable microcontroller clock source between 0.96MHz and 7.68MHz
• Selection between Bit clock (BCL) and Data clock (DCL)
• Supports synchronization of base stations in Wireless Local Loop applications
• Supports D-channel arbitration with ELIC® linecard (e.g. PBX)
1.2
Ordering Codes
Type
Ordering Code
Q67236-H1078
Q67236-H1069
Q67237-H1079
Q67237-H1077
Package
P-LCC-44
P-LCC-44
M-QFP-64
T-QFP-64
PEB 2091 N V5.3
PEF 2091 N V5.3
PEF 2091 H V5.3
PEF 2091 F V5.3
Semiconductor Group
20
Data Sheet 01.99