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PEB2091NV5.3 参数 Datasheet PDF下载

PEB2091NV5.3图片预览
型号: PEB2091NV5.3
PDF下载: 下载PDF文件 查看货源
内容描述: 集成电路通信( ISDN Echocancellation电路) [ICs for Communications(ISDN Echocancellation Circuit)]
分类和应用: 电信集成电路综合业务数字网通信
文件页数/大小: 299 页 / 1531 K
品牌: INFINEON [ Infineon ]
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PEB 2091  
PEF 2091  
Operational Description  
4.3.13  
Activation Attempt Initiated by NT in NT-Auto Activation Mode  
Note 39: See "Basic Operating Mode", page 50, for setting this mode.  
If the LT transceiver is available and ready for activation, e.g. if the LT is not in the reset  
or in any test state, the NT IEC-Q will start in this mode one single activation attempt after  
leaving the "TEST" state, i.e. after being reset. In this case activation proceeds as  
described in the previous sections.  
However, If the LT is not ready for activation, the NT will periodically start a new  
activation attempt every 15 seconds, till the LT side will be available and ready for  
activations initiated by the NT side. See "State Transition Diagram in NT-Auto Activation  
Mode", page 162.  
4.3.14  
Activation in the µP-NT Mode  
Note 40: This function is only available if the NT mode in conjunction with the  
microprocessor mode (PMODE = "1") are used. Note also that if the  
IOM®-2 clock disable mode is set (see "IOM®-2 Enable/Disable Mode",  
page 53) activation in µP NT mode without IOM®-2 will not be possible.  
In some NT and TE applications in the µP mode, the IOM®-2 interface is functionally not  
needed (e.g. inband signaling, some PC card applications etc.). In such cases it is  
possible to control the internal state of the pin DIN via the MSB of the CIWU register (see  
"CIWU-Register", page 217). Setting the SPU (software power up) bit to "0" in the NT  
mode will cause the DIN signal to be set internally to "0", regardless of the value of the  
pin DIN. Setting the SPU bit to "1", which is the default value after reset, will set the pin  
DIN transparent to the internal circuit, see Figure 69 below.  
IEC-Q  
IEC-Q  
Transceiver  
Core  
Transceiver  
Core  
DIN  
DIN  
µP  
interface  
µP  
interface  
GND  
CIWU:SPU=1  
default  
CIWU:SPU= 0  
Figure 69  
DIN Control via CIWU:SPU in NT µP Mode  
Example for Activation with µP  
Assumption: The C/I-Channel is being controlled via µP (i.e., SWST:CI=1, see "C/I  
Channel Access", page 100).  
Semiconductor Group  
142  
Data Sheet 01.99