PEB 2091
PEF 2091
Operational Description
Table 22
Bit
Function of the Predefined SB in NT Modes
Function
PS1
(Power Status Primary Source)
The PS1-bit is used to indicate the status of the primary NT power supply.
It is set to (1) if the level at pin PS1 is high. PS1 = (1) indicates that the
primary power supply is normal
PS2
(Power Status Secondary Source)
The PS2 bit is used to indicate the status of the secondary NT power
supply. It is set to (1) if the level at pin PS2 is high. PS2 = (1) indicates that
the secondary power supply is normal
NTM
(NT Test Mode)
This bit informs the network side that the NT is involved in terminal initiated
tests and therefore is not available for transparent transmission. The
NTM-bit set to (0) indicates that the NT is in a test mode. The NTM-bit is set
to (0) with the MON-1 command "NTM" and is reset to (1) by "NORM"
SB Transmission in LT Modes
Note 35: This section applies in LT and COT modes (see "Basic Operating
Mode", page 50).
The Single Bits will be set in the following manner:
• The Single Bits ACT and DEA are controlled internally by the activation/deactivation
state machine (see "State Machine in LT Modes", page 146).
• Two different ways are available to control the Single bit UOA:
1- Internally by the activation/deactivation state machine (see "State Machine in LT
Modes", page 146), which is the default setting after power up.
2- By the MON-2 command.
Control via MON-2 can be set by issuing the MON-8 command PACE. To change this
setting back to IEC-Q internal control (1), the MON-8 command PACA can be issued.
(See "MON-8 Codes", page 228, for details about codes and programming of these
commands).
• The Single bit FEBE is controlled internally by the CRC processor (see "Monitoring
Transmission Quality", page 176). In addition the MON-8 message SFB can be issued
to set the FEBE bit to "0" (test mode, see "MON-8 Codes", page 228, for details
MON-8 codes and programming).
• All other Single Bits, i.e. M43-M46, M48 M51, M52 and M61 can be set by the user via
MON-2 messages.
Table 21 gives an overview of SB control, and Table 22 gives a brief explanation of the
function of the SB in this mode.
Semiconductor Group
118
Data Sheet 01.99
INFINEON [ Infineon ]
