PEB 2086
Timing Mode 1
In timing mode 1, CP(i) and X2(i) occur 1/8 × 125 µs earlier together with FSC 1.
CP(i)
FSC1(i)
1 / 8
1 / 8
Frame
Period
Frame
Period
FSC2(i)
t SFD
t SFD
NT to TE
B2
E D L.F L.
B1
E D A F N
B2
E D M
B1
B1
E D S
B2
E D L. F L.
A
0
1
0
IDP1(i)
X2(i)
B1
B2
B2
ITD03737
Figure 110
Frame Relationship in Timing Mode 1
Parameter
Symbol Limit Values
tSFD
16 µs ± 300 ns1) ± 130 ns (jitter)
S-interface to FSC-delay
1)
Internal delays are dependent on temperature, VDD and fabrication parameters.
Semiconductor Group
270