Electrical Characteristics
CS x DS
t AS
t AH
AD0 - AD5
ITT00718
Figure 94
Non-Multiplexed Address Timing
Microprocessor Interface Timing
Parameter
Symbol
Limit Values
Unit
min.
max.
ALE pulse width
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AA
50
15
10
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address setup time to ALE
Address hold time from ALE
Address latch setup time to WR, RD
Address setup time
AL
LA
ALS
AS
25
10
15
0
Address hold time
AH
AD
DSD
RR
RD
DF
ALE guard time
DS delay after RW setup
RD pulse width
110
Data output delay from RD
Data float from RD
110
25
RD control interval
RI
70
60
35
10
70
W pulse width
WW
DW
WD
WI
Data setup time to W × CS
Data hold time from W × CS
W control interval
Semiconductor Group
253
INFINEON [ Infineon ]
