Static @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
∆ΒV
DSS
/∆T
J
R
DS(on)
V
GS(th)
gfs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min. Typ. Max. Units
100
–––
–––
2.0
35
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.10
14
–––
–––
–––
–––
–––
–––
82
19
27
17
77
41
56
4.5
7.5
2900
290
150
1130
170
280
–––
–––
18
4.0
–––
20
250
200
-200
120
28
40
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
pF
Conditions
V V
GS
= 0V, I
D
= 250µA
V/°C Reference to 25°C, I
D
= 1mA
mΩ V
GS
= 10V, I
D
= 35A
V V
DS
= V
GS
, I
D
= 250µA
S V
DS
= 50V, I
D
= 35A
µA V
DS
= 100V, V
GS
= 0V
V
DS
= 100V, V
GS
= 0V, T
J
= 125°C
nA V
GS
= 20V
V
GS
= -20V
nC I
D
= 35A
V
DS
= 80V
V
GS
= 10V
ns V
DD
= 50V
I
D
= 35A
R
G
= 6.8Ω
V
GS
= 10V
D
nH Between lead,
f
f
f
6mm (0.25in.)
from package
G
S
and center of die contact
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 80V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 80V
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
–––
–––
–––
–––
–––
–––
50
100
59
A
240
1.3
75
160
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
G
D
Ã
p-n junction diode.
T
J
= 25°C, I
S
= 35A, V
GS
= 0V
T
J
= 25°C, I
F
= 35A, V
DD
= 25V
di/dt = 100A/µs
f
S
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
f
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.27mH,
R
G
= 25Ω, I
AS
= 35A, V
GS
=10V. Part not
recommended for use above this value.
I
SD
≤
35A, di/dt
≤
380A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C.
Pulse width
≤
1.0ms; duty cycle
≤
2%.
C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D
2
Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
2
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