IDT71V424S, IDT71V424L, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
Commercial and Industrial Temperature Ranges
AC Electrical Characteristics
(VCC = 3.3V ± 10%, Commercial and Industrial Temperature Ranges)
71V424S/L10(2)
71V424S/L12
71V424S/L15
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
____
____
____
t
RC
AA
ACS
Read Cycle Time
10
12
15
ns
ns
ns
ns
____
____
____
t
Address Access Time
10
12
15
____
____
____
t
Chip Select Access Time
Chip Select to Output in Low-Z
10
12
15
____
____
____
(1)
CLZ
4
4
4
t
(1)
____
____
____
Chip Deselect to Output in High-Z
Output Enable to Output Valid
5
6
7
ns
ns
ns
ns
ns
ns
ns
t
CHZ
____
____
____
tOE
5
6
7
____
____
____
(1)
(1)
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
0
0
0
tOLZ
____
____
____
5
6
7
t
OHZ
____
____
____
tOH
4
4
4
____
____
____
(1)
PU
0
0
0
t
____
____
____
(1)
PD
10
12
15
t
WRITE CYCLE
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
t
WC
AW
CW
AS
WP
WR
DW
DH
Write Cycle Time
10
8
12
8
15
10
10
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
Address Valid to End of Write
Chip Select to End of Write
Address Set-up Time
Write Pulse Width
t
8
8
t
0
0
t
8
8
10
0
t
Write Recovery Time
Data Valid to End of Write
Data Hold Time
0
0
t
6
6
7
t
0
0
0
____
____
____
(1)
OW
Output Active from End of Write
3
3
3
t
____
____
____
(1)
WHZ
Write Enable to Output in High-Z
6
7
7
ns
t
3622 tbl 10
NOTES:
1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested.
2. 0ºC to +70ºC temperature range only for low power 10ns (L10) speed grade.
6.42
5
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
