IDT71V424S, IDT71V424L, 3.3V CMOS Static RAM
4 Meg (512K x 8-bit)
Commercial and Industrial Temperature Ranges
PinConfiguration
PinConfiguration
NC
NC
NC
NC
A0
1
2
44
43
A0
A1
A2
A3
A4
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
3
NC
A18
A17
42
41
40
A1
A2
A3
4
5
A16
A15
6
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
I/O 7
I/O 6
I/O 0
I/O 1
A4
7
8
CS
OE
SO36-1
VDD
V
V
SS
I/00
I/01
9
I/07
I/06
VSS
DD
10
11
12
13
14
15
16
17
18
19
20
21
22
I/O 2
I/O 3
WE
I/O 5
I/O 4
A14
A13
A12
A11
A10
NC
SO44-2
V
V
DD
SS
V
V
SS
DD
A5
A6
A7
A8
A9
I/02
I/03
I/05
I/04
A14
WE
A5
A13
A12
A6
A7
A8
A9
NC
NC
A11
A10
NC
3622 drw 02
SOJ
Top View
NC
NC
3622 drw 11
TSOP
Top View
PinDescription
Capacitance
(TA = +25°C, f = 1.0MHz, SOJ package)
A
0
– A18
Address Inputs
Input
Symbol
CIN
Parameter(1)
Input Capacitance
I/O Capacitance
Conditions
VIN = 3dV
VOUT = 3dV
Max. Unit
Chip Select
Input
Input
Input
I/O
CS
7
8
pF
Write Enable
Output Enable
Data Input/Output
3.3V Power
Ground
WE
OE
CI/O
pF
3622 tbl 03
I/O0 - I/O7
NOTE:
1. This parameter is guaranteed by device characterization, but not production
tested.
VDD
Power
Gnd
VSS
3622 tbl 02
Truth Table(1,2)
CS
OE
WE
I/O
Function
L
L
H
DATAOUT Read Data
DATAIN Write Data
High-Z Output Disabled
L
X
H
X
X
L
L
H
H
X
High-Z Deselected - Standby (ISB
)
(3)
HC
X
High-Z Deselected - Standby (ISB1
)
V
3622 tbl 01
NOTES:
1. H = VIH, L = VIL, x = Don't care.
2. VLC = 0.2V, VHC = VDD -0.2V.
3. Other inputs ≥VHC or ≤VLC.
6.42
2
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
