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9UMS9633BKILFT 参数 Datasheet PDF下载

9UMS9633BKILFT图片预览
型号: 9UMS9633BKILFT
PDF下载: 下载PDF文件 查看货源
内容描述: 超移动PC时钟为工业级温度范围 [ULTRA MOBILE PC CLOCK FOR INDUSTRIAL TEMPERATURE RANGE]
分类和应用: PC时钟
文件页数/大小: 22 页 / 211 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS9UMS9633BI  
Advance Information  
ULTRA MOBILE PC CLOCK FOR INDUSTRIAL TEMPERATURE RANGE  
Byte  
Bit(s)  
2
Output Enable Register  
Name  
Pin #  
Description  
Type  
0
1
Default  
This bit controls whether the CPU[0] output buffer  
is enabled or not.  
This bit controls whether the CPU[1] output buffer  
is enabled or not.  
This bit controls whether the CPU[2] output buffer  
is enabled or not.  
This bit controls whether the SRC[0] output buffer  
is enabled or not.  
This bit controls whether the SRC[1] output buffer  
is enabled or not.  
This bit controls whether the SRC[2] output buffer  
is enabled or not.  
This bit controls whether the DOT output buffer is  
enabled or not.  
This bit controls whether the LCD output buffer is  
enabled or not.  
7
6
5
4
3
2
1
0
CPU0 Enable  
CPU1 Enable  
CPU2 Enable  
SRC0 Enable  
SRC1 Enable  
SRC2 Enable  
DOT Enable  
RW  
0 = Disabled  
1 = Enabled  
1
RW  
RW  
RW  
RW  
RW  
RW  
RW  
0 = Disabled  
0 = Disabled  
0 = Disabled  
0 = Disabled  
0 = Disabled  
0 = Disabled  
0 = Disabled  
1 = Enabled  
1 = Enabled  
1 = Enabled  
1 = Enabled  
1 = Enabled  
1 = Enabled  
1 = Enabled  
1
1
1
1
1
1
1
LCD100 Enable  
Byte  
Bit(s)  
7
3
Output Control Register  
Name  
Pin #  
Description  
Reserved  
Reserved  
Type  
0
1
Default  
0
0
6
This bit controls whether the REF output buffer is  
enabled or not.  
5
4
3
REF Enable  
REF Slew  
RW  
RW  
0 = Disabled  
1 = Enabled  
1
00 = Slow Edge Rate  
01 = Medium Edge Rate  
10 = Fast Edge Rate  
11 = Reserved  
These bits control the edge rate of the REF clock.  
10  
This bit controls whether the CPU[0] output buffer  
is free-running or stoppable. If it is set to stoppable  
the CPU[0] output buffer will be disabled with the  
assertion of CPU_STP#.  
This bit controls whether the CPU[1] output buffer  
is free-running or stoppable. If it is set to stoppable  
the CPU[1] output buffer will be disabled with the  
assertion of CPU_STP#.  
This bit controls whether the CPU[2] output buffer  
is free-running or stoppable. If it is set to stoppable  
the CPU[2] output buffer will be disabled with the  
assertion of CPU_STP#.  
2
1
0
CPU0 Stop Enable  
CPU1 Stop Enable  
CPU2 Stop Enable  
RW  
RW  
RW  
Free Running  
Free Running  
Free Running  
Stoppable  
Stoppable  
Stoppable  
0
0
0
IDTTM/ICSTM Ultra Mobile PC Clock for Industrial Temperature Range  
1451—01/20/09  
14  
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