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502-DPK 参数 Datasheet PDF下载

502-DPK图片预览
型号: 502-DPK
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 190MHz, CMOS, DIE]
分类和应用: 时钟外围集成电路晶体
文件页数/大小: 7 页 / 176 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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DATASHEET
LOCO™ PLL CLOCK MULTIPLIER
Description
The ICS502 LOCO
TM
is the most cost effective way to
generate a high-quality, high-frequency clock output and a
reference from a lower frequency crystal or clock input. The
name LOCO stands for Low Cost Oscillator, as it is
designed to replace crystal oscillators in most electronic
systems. Using Phase-Locked Loop (PLL) techniques, the
device uses a standard fundamental mode, inexpensive
crystal to produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate six
different multiplication factors, allowing one chip to output
many common frequencies (see table on page 2).
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed. For
applications which require defined input to output skew, use
the ICS570B.
ICS502
Features
Packaged as 8-pin SOIC or die
Pb (lead) free package
IDT’s lowest cost PLL clock
Zero ppm multiplication error
Easy to cascade with ICS5xx series
Input crystal frequency of 5 – 27 MHz
Input clock frequency of 2 – 50 MHz
Output clock frequencies up to 190 MHz
Low jitter – 50 ps one sigma
Compatible with all popular CPUs
Duty cycle of 45/55 up to 160 MHz
Operating voltages of 3.0 to 5.5 V
25 mA drive capability at TTL levels
Industrial temperature version available
Advanced, low-power CMOS process
Block Diagram
VDD
S1, S0
X1/ICLK
Crystal or
Clock input
X2
2
PLL Clock
Multiplier
Circuitry and
ROM
CLK
Crystal
OScillator
REF
GND
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER
1
ICS502
REV M 051310