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307GI-03 参数 Datasheet PDF下载

307GI-03图片预览
型号: 307GI-03
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 270MHz, PDSO16, 4.40 MM, 0.65 MM PITCH, MO-153, TSSOP-16]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 13 页 / 404 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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DATASHEET
SERIALLY PROGRAMMABLE CLOCK SOURCE
Description
The ICS307-03 is a dynamic, serially programmable clock
source which is flexible and takes up minimal board space.
Output frequencies are programmed via a 3-wire SPI port.
An advanced PLL coupled to an array of configurable
output dividers and three outputs allows low-jitter
generation of frequencies from 200 Hz to 270 MHz.
The device can be reprogrammed during operation, making
it ideal for applications where many different frequencies
are required, or where the output frequency must be
determined at run time. Glitch-free frequency transitions,
where the clock period changes slightly over many cycles,
are possible.
ICS307-03
Features
Crystal or clock reference input
3.3 V CMOS outputs
Three outputs can be individually configured or shut off
Small 16-pin TSSOP package
Reprogrammable during operation
3-wire SPI serial interface
Glitch-free output frequency switching
User selectable charge pump current and damping
resistor
bit
Power-down control via hardware pin or software control
Programming word can be generated by IDT VersaClock
II Software
Directly programmable via VersaClock II Software and a
Windows PC parallel port
Available in Pb (lead) free package, RoHS 5/6 compliant
Industrial temperature range available
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
Block Diagram
Charge Pump
(Table 3)
(Table 1)
X1
[Bit 122]
X2
VCO DIVIDE
12-2055
(Table 2)
1
0
DIN
CS
SCLK
Programming
Register
(132 bits)
[Bit 123]
Divider
2 - 34
(Table 6)
[Bit 111]
CLK2
REF Divide
1-2055
Resistor
(Table 4)
300
pF
Divider
2 - 8232
(Table 5)
[Bit 110]
CP
11pF
CLK1
1
0
[Bit 124]
Divider
2 - 34
(Table 7)
[Bit 129]
CLK3
IDT™ / ICS™
SERIALLY PROGRAMMABLE CLOCK SOURCE
1
ICS307-03
REV J 090209