IDT29FCT2052AT/BT/CT
FAST CMOS OCTAL REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
D.U.T.
50pF
R
T
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
8-link
7.0V
Switch
Closed
V
OUT
500
Ω
C
L
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
O ctal lin k
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
t
SU
TIM ING
INPUT
ASYNCHRONOUS C ONTROL
PRES ET
CLEAR
ETC.
SYNCHRO NOUS CONTRO L
PRES ET
CLEAR
CLOCK ENABLE
ETC.
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
O ctal lin k
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
SAM E PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE P HASE
INPUT TRANSITION
t
PH L
t
PH L
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENAB LE
DISA BLE
3V
CO NTROL
INPUT
t
PZL
OUTPUT
NO RM A LLY
LO W
SW ITCH
CLOSE D
t
PZH
OUTPUT
NO RM A LLY
HIGH
SW ITCH
OPEN
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
O ctal lin k
1.5V
t
PLZ
0V
3.5V
V
OL
V
OH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
6