ICS252
FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER
EPROM CLOCK SYNTHESIZER
Revision History
Rev.
A
B
C
D
E
F
G
H
J
Originator
R.Willner
R.Willner
R.Willner
R.Willner
R.Willner
R.Willner
—
—
RDW
Date
04/08/05
01/16/06
06/13/06
08/10/07
08/20/07
03/16/09
08/18/09
05/13/10
05/20/10
Description of Change
Preliminary release.
Corrected Block Diagram. Released from Prelim to Final.
Added "-XX" part ordering information and specific note pertaining to custom
configurations of device.
Removed “Inernal pull-up resistor” info from PDTS pin description and added extrenal
pull-up resistor statement/information.
Changed S1 pin name to “SEL”; removed references to PDTS pin; changed pull-up
resistor value from 190 to 120 kOhms.
Correct page 1 text to have 2 selectable configuration registers.
Added EOL note per PDN U-09-01.
Removed EOL note and non-green orderables.
Changed max VDD Supply Voltage from 7V to 4.6V.
IDT®
FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER 9
ICS252
REV J 052010
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
