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23S09E-1HPGGI8 参数 Datasheet PDF下载

23S09E-1HPGGI8图片预览
型号: 23S09E-1HPGGI8
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V零延迟时钟缓冲器,扩频兼容 [3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE]
分类和应用: 时钟
文件页数/大小: 8 页 / 69 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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IDT23S09E
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loading can affect and adjust the input/output delay.
For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. For zero output-to-output skew, all outputs must be loaded equally.
SPREAD SPECTRUM COMPATIBLE
Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter
off the Spread Spectrum feature of the reference input, assuming it exists. When a zero delay buffer is not designed to pass the Spread Spectrum feature
through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.
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