23S09E-1HPGGI8 参数 Datasheet PDF下载

IDT23S09E

3.3V ZERO DELAY CLOCK BUFFER

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

FUNCTION TABLE

(1)

S2

L

L

H

H

S1

L

H

L

H

CLKA

Tri-State

Driven

Driven

Driven

CLKB

Tri-State

Tri-State

Driven

Driven

CLKOUT

(2)

Driven

Driven

Driven

Driven

Output Source

PLL

PLL

REF

PLL

PLL Shut Down

N

N

Y

N

NOTES:

1. H = HIGH Voltage Level.

L = LOW Voltage Level

2. This output is driven and has an internal feedback for the PLL. The load on this ouput can be adjusted to change the skew between the REF and the output.

DC ELECTRICAL CHARACTERISTICS - COMMERCIAL

Symbol

V

IL

V

IH

I

IL

I

IH

V

OL

V

OH

I

DD_PD

I

DD

Parameter

Input LOW Voltage Level

Input HIGH Voltage Level

Input LOW Current

Input HIGH Current

Output LOW Voltage

Output HIGH Voltage

Power Down Current

Supply Current

V

IN

= 0V

V

IN

= V

DD

Standard Drive

High Drive

Standard Drive

High Drive

REF = 0MHz (S2 = S1 = H)

Unloaded Outputs at 66.66MHz, SEL inputs at V

DD

or GND

I

OL

= 8mA

I

OL

= 12mA (-1H)

I

OH

= -8mA

I

OH

= -12mA (-1H)

—

—

12

32

µA

mA

2.4

—

V

Conditions

Min.

—

2

—

—

—

Max.

0.8

—

50

100

0.4

Unit

V

V

µA

µA

V

OPERATING CONDITIONS - COMMERCIAL

Symbol

V

DD

T

A

C

L

C

IN

Supply Voltage

Operating Temperature (Ambient Temperature)

Load Capacitance < 100MHz

Load Capacitance 100MHz - 200MHz

Input Capacitance

Parameter

Min.

3

0

—

—

—

Max.

3.6

70

30

10

7

pF

Unit

V

°

C

pF

SWITCHING CHARACTERISTICS (23S09E-1) - COMMERCIAL

(1,2)

Symbol

t

1

Output Frequency

Duty Cycle = t

2

÷

t

1

t

3

t

4

t

5

t

6A

t

6B

t

7

t

J

t

LOCK

Rise Time

Fall Time

Output to Output Skew

Delay, REF Rising Edge to CLKOUT Rising Edge

(2)

Delay, REF Rising Edge to CLKOUT Rising Edge

(2)

Device-to-Device Skew

Cycle-to-Cycle Jitter

PLL Lock Time

Parameter

10pF Load

30pF Load

Measured at 1.4V, F

OUT

= 66.66MHz

Measured between 0.8V and 2V

Measured between 0.8V and 2V

All outputs equally loaded

Measured at V

DD

/2

Measured at V

DD

/2 in PLL bypass mode (IDT23S09E only)

Measured at V

DD

/2 on the CLKOUT pins of devices

Measured at 66.66MHz, loaded outputs

Stable power supply, valid clock presented on REF pin

Conditions

Min.

10

10

40

—

—

—

—

1

—

—

—

Typ.

—

—

50

—

—

—

0

5

0

—

—

Max.

200

100

60

2.5

2.5

250

±350

8.7

700

200

1

%

ns

ns

ps

ps

ns

ps

ps

ms

Unit

MHz

NOTES:

1. REF Input has a threshold voltage of V

DD

/2.

2. All parameters specified with loaded outputs.

3