IDT23S08E
3.3VZERODELAYCLOCKMULTIPLIER
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
FUNCTION TABLE(1)SELECTINPUTDECODING
S2
L
S1
L
CLK A
Tri-State
Driven
Driven
Driven
CLK B
Tri-State
Tri-State
Driven
Output Source
PLL Shut Down
PLL
PLL
REF
PLL
Y
N
Y
N
L
H
L
H
H
H
Driven
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
AVAILABLEOPTIONSFORIDT23S08
Device
FeedbackFrom
Bank A or Bank B
Bank A or Bank B
Bank A
BankAFrequency
BankBFrequency
IDT23S08E-1
IDT23S08E-1H
IDT23S08E-2
IDT23S08E-2
IDT23S08E-2H(1)
IDT23S08E-2H(1)
IDT23S08E-3(1)
IDT23S08E-3(1)
IDT23S08E-4
IDT23S08E-5H
Reference
Reference
Reference
Reference
Reference/2
Reference
Reference/2
Reference
Reference
Bank B
2xReference
Reference
Bank A
Bank B
2xReference
2xReference
4xReference
2xReference
Reference/2
(2)
Bank A
ReferenceorReference
2 x Reference
Bank B
Bank A or Bank B
Bank A or Bank B
2 x Reference
Reference/2
NOTES:
1. Contact factory for availability.
2. Output phase is indeterminant (0° or 180° from input clock).
SPREADSPECTRUMCOMPATIBLE
Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter
offtheSpreadSpectrumfeatureofthereferenceinput, assumingitexists. WhenazerodelaybufferisnotdesignedtopasstheSpreadSpectrumfeature
through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.
3
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
