ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
Pin Assignment
CLKIN
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLKOUT
CLKA4
CLKA3
VDD
GND
CLKB4
CLKB3
S1
16 pin narrow (150 mil) SOIC
Output Clock Mode Select Table
S2
0
0
1
1
S1
0
1
0
1
CLKA1:A4
Tri-state (note 1)
Running
Running
Running
CLKB1:B4
Tri-state (note 1)
Tri-state (note 1)
Running
Running
A & B Source
PLL
PLL
CLKIN (note 2)
PLL
CLKOUT
Driven
Driven
PLL Bypass Mode
Driven
PLL Status
OFF
ON
OFF
ON
Note 1. Outputs are in high impedance state
Note 2. Buffer mode only; not zero delay between input and output
Pin Descriptions
Pin
Number
1
2-3
4
5
6-7
8
9
10 - 11
12
13
14 - 15
16
Pin
Name
CLKIN
CLKA1:A4
VDD
GND
CLKB1:B4
S2
S1
CLKB1:B4
GND
VDD
CLKA1:A4
CLKOUT
Pin Type
Input
Output
Power
Power
Output
Input
Input
Output
Power
Power
Output
Input
Clock input (5 V tolerant).
Clock outputs A1:A4. See table above.
Power supply. Connect to 3.3 V.
Connect to ground.
Clock outputs B1:B4. See table above.
Select input 2. See table above. Internal pull-up.
Select input 1. See table above. Internal pull-up.
Clock outputs B1:B4. See table above.
Connect to ground.
Power supply. Connect to 3.3 V.
Clock outputs A1:A4. See table above.
Buffered output. Internal feedback on this pin.
Pin Description
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
2
ICS2309
REV F 041906
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
