DATASHEET
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
Description
The ICS2309 is a low phase noise, high-speed PLL
based, low-skew zero delay buffer. Based on ICS’
proprietary low jitter Phase Locked Loop (PLL)
techniques, the device provides nine low skew outputs
at speeds up to 133 MHz at 3.3 V. The outputs can be
generated from the PLL (for zero delay), or directly from
the input (for testing), and can be set to tri-state mode
or to stop at a low level. The PLL feedback is on-chip
and is obtained from the CLKOUT pad.
The ICS2309 is available in two different versions. The
ICS2309-1 is the base part. The ICS2309-1H is a high
drive version with faster rise and fall times.
ICS2309
Features
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Clock outputs from 10 to 133 MHz
Zero input-output delay
Nine low skew (<250 ps) outputs
Device-to-device skew <700 ps
Full CMOS outputs with 12 mA output drive
capability at TTL levels
5 V tolerant CLKIN
Tri-state mode for board-level testing
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V
Industrial temperature range available
Packaged in 16-pin SOIC and TSSOP (-1H version
only)
complaint packaging
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RoHS 5 (green) or RoHS 6 (green and lead free)
Block Diagram
VDD
2
CLKIN
PLL
0
CLKOUT
1
CLKA1
CLKA2
CLKA3
CLKA4
S2, S1 2
Control
Logic
CLKB1
CLKB2
CLKB3
CLKB4
GND
2
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
1
ICS2309
REV F 041906
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
