ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
Bit
Definition
When Bit = 0
Link Partner
When Bit = 1
Access 2 SF2
Default3
Hex
23.3
Link Partner
Acknowledge Interrupt Acknowledge did not
occur
Link Partner Acknowledge
occurred
RO/SC
0
0
23.2
23.1
Link Down Interrupt
Link Down did not occur Link Down occurred
RO/SC
RO/SC
0
0
Remote Fault Interrupt Remote Fault did not
occur
Remote Fault occurred
23.0
Link Up Interrupt
Link Up did not occur
Link Up occurred
RO/SC
0
Register 24h - Extended Control Register
24.15:12
24.11:9
24.8
FIFO Half
Reserved
RMII FIFO half full bits ((n+3)*2 bit), RMII
RW
RW
RW
2
0
0
2
0
Reserved
Deep Power down
enable
Deep power down(DPD) Deep power down(DPD)
disable
enable
24.7
24.6
Tpll10_100 DPD Enable Don't power down
Controlled auto power
down10/100 PLL in DPD
mode
RW
RW
RW
RW
0
0
0
0
0
0
10/100 PLL in DPD
mode
RX 100 DPD Enable
Don't power down RX
block in DPD mode
Controlled auto power
down of RX block in DPD
mode
24.5
Admix_TX DPD Enable Don't power down
Control auto power down
admix_dac block in DPD of admix_dac block in
mode DPD mode
24.4
Cdr100_cdr DPD Enable don't power down in DPD Control auto power down
mod
of CDR block in DPD
mode
24.3:0
Reserved
Reserved
Reserved
0
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
27
ICS1894-40
REV G 060110
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
