ICS1893CF Data Sheet Rev. J - Release
Chapter 7 Management Register Set
7.12.1 Data Rate (bit 17.15)
The Data Rate bit indicates the ‘selected technology’. If the ICS1893CF is in:
• Hardware mode, the value of this bit is determined by the 10/100SEL input pin.
• Software mode, the value of this bit is determined by the Data Rate bit 0.13.
When bit 17.15 is logic:
• Zero, it indicates that 10-MHz operations are selected.
• One, the ICS1893CF is indicating that 100-MHz operations are selected.
Note: This bit does not imply any link status.
7.12.2 Duplex (bit 17.14)
The Duplex bit indicates the ‘selected technology’. If the ICS1893CF is in:
• Hardware mode, the value of this bit is determined by the DPXSEL input pin.
• Software mode, the value of this bit is determined by the Duplex Mode bit 0.8.
When bit 17.14 is logic:
• Zero, it indicates that half-duplex operations are selected.
• One, the ICS1893CF is indicating that full-duplex operations are selected.
Note: This bit does not imply any link status.
7.12.3 Auto-Negotiation Progress Monitor (bits 17.13:11)
The Auto-Negotiation Progress Monitor consists of the Auto-Negotiation Complete bit (bit 17.4) and the
three Auto-Negotiation Monitor bits (bits 17.13:11). The Auto-Negotiation Progress Monitor continually
examines the state of the Auto-Negotiation Process State Machine and reports the status of
Auto-Negotiation using the three Auto-Negotiation Monitor bits. Therefore, the value of these three bits
provides the status of the Auto-Negotiation Process.
These three bits are initialized to logic zero in one of the following ways:
• A reset (see Section 4.1, “Reset Operations”)
• Disabling Auto-Negotiation [see Section 7.2.4, “Auto-Negotiation Enable (bit 0.12)”]
• Restarting Auto-Negotiation [see Section 7.2.7, “Restart Auto-Negotiation (bit 0.9)”]
If Auto-Negotiation is enabled, these bits continually latch the highest state that the Auto-Negotiation State
Machine achieves. That is, they are updated only if the binary value of the next state is greater than the
binary value of the present state as outlined in Table 7-19.
ICS1893CF, Rev. J, 08/11/09
August, 2009
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
73
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
